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UCIe Chiplet PHY & Controller
UCIe Chiplet PHY & Controller

INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogeneous high-performance and efficient connectivity. It supports die-to-die (D2D), chip-to-chip (C2C), interposer and PCB connectivity, ideal for data centers, 5G, HPC, and AI. The IP suite includes UCIe-S (24 Gbps/pin, 100 um~150 um pitch) for MCM/short PCB, and UCIe-A (32 Gbps/pin, 25 um~55 um pitch) for silicon interposers. Both support scalable bandwidth (UCIe-A: 2048 Gbps; UCIe-S: 384 Gbps) with scalability for 1/2/4/8 modules and are compatible with UCIe standard and advanced package mode.

UCIe-S 24Gbps
UCIe-S 24Gbps
UCIe-S 16Gbps
UCIe-S 16Gbps
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