Innosilicon has industry-leading top-level architecture design capabilities and advanced solutions for applications such as HPC, AI, and automotive. With the help of self-developed IP and mature subsystem design, we can quickly complete top-level code integration and achieve optimal PPA. At the same time, Innosilicon has an expert team in front-end design and verification processes, which can ensure the safety and reliability of the design.
Special IP or Interface Design
Required by Customers
SoC Architecture Deign
NoC Bus Based on Topology
or Mesh Structure
SoC Integration and Synthesis
PPA Optimization
CDC/RDC Check
Timing Optimization
Equivalence Check
Complete set of VIPs from all mainstream vendors
Self-designed QEMU virtual platform for system bug localization
Mature testcase and automated regression tools for improving code coverage
Efficient and visual performance & power analysis tools
1,000–400,000x faster than EDA simulation
Leading hardware installed capacity and rich SpeedBridge Boards for large-scale chips
Stress test of final design with real-world stimulus
Software development and testing prior to silicon
Flexible platform for subsystem & IP verification and cluster for SoC verification
Automatic design partition technology and self-developed debug modules
Rich self-developed interface IP external PHY sub-board
