64G Multi-SerDes
INNOSILICON™ 64G Multi-SerDes PHY IP is a highly configurable PHY capable of supporting speeds up to 64 Gbps within a single lane. The PHY is pre-configured to support 64G PAM-4 and NRZ, but can be configured to support a wide range of HS SerDes protocols through changes to the PCS layer and register settings.
64G Multi-SerDes
INNOSILICON™ 64G Multi-SerDes PHY IP is a highly configurable PHY capable of supporting speeds up to 64 Gbps within a single lane. The PHY is pre-configured to support 64G PAM-4 and NRZ, but can be configured to support a wide range of HS SerDes protocols through changes to the PCS layer and register settings.
64G High-speed SerDes64G High-speed SerDes
The hard-macro PHY is well-architected for IEEE and OIF protocols, with ESD structure and BIST function accommodated. This IP provides high-speed connectivity between ICs, optics, and backplanes with a built-in low-jitter LC PLL for optimized signal integrity. The INNOSILICON™ 64G Long-Reach SerDes solution meets the functionality, power, performance and area requirements of a variety of network applications.
56 Gbps Multi-SerDes Eye Diagram
- Benefits
- Features
- Deliverables
- Applications
