Innosilicon has rich back-end design experience in various advanced process nodes of all mainstream foundry manufacturers, including TSMC 3nm and Samsung 4nm. Especially for high-speed interfaces and large-scale complex chips, Innosilicon boasts an efficient and complete design flow that can complete reliable back-end designs in the shortest possible time, accelerate Tape-Out time, and achieve high density and ultimate PPA indicators.
High Density with best PPA
Large Die Sizes: > 600mm²
Max Performance: >2.5GHz CPU/GPU Core
High-Bandwidth Memory Interfaces: HBM3, GDDR6/7, DDR5, LPDDR5x
High-Speed Connectivity Interfaces: PCIe Gen5
CXL 2.0, USB4/3.2, 100G Ethernet, MIPI CSI/DSI, UCIe 1.1 D2D
Over 300+ successful tapeout records
Target on advanced Finfet nodes: 3/4/5/6/7/8/12/14nm
19+ years back-end experience and over 200+ people team.
Clock tree optimization
Manual optimized layout
Using customized cells
